Marvell

RISC Computing

Marvell's CPU microarchitecture follows the paradigm of RISC (Reduced Instruction Set Computing). The philosophy of RISC is to define an instruction set that is simple, with few instruction types. By having fewer instruction types, the CPU can be less complex, consume less power, and be more efficient. These instruction types can be broken down into three types: Memory, Arithmetic/Data, and Control.

Memory — In order to compute anything, a system must have data to manipulate. This data set can be very large, and it is stored in main memory. As a program runs, the CPU will access many parts of main memory. In an embedded system, main memory is generally Dynamic Random Access Memory DRAM (a low cost, high capacity, basic form of solid state memory used in all computers), although it may also be Flash, SRAM, or other technologies.

In the RISC paradigm, the CPU does not work directly with data from main memory. Instead, the CPU must bring data from main memory, and then place them into registers. A register is a very small piece of very fast memory inside the CPU. A CPU that is ARM instruction set compliant has a total of 31 registers, each 32 bits long. The registers are generally numbered, so you will have register0, register1, register2, etc. etc. There are many "load" and "store" type instructions whose purpose is to bring data from main memory into the registers, and to copy data back out from the registers.

The CPU can work with data that is already in its registers much faster than if it has to keep pulling data from main memory. One of the principles of RISC computing architecture is a large register set (31 is considered large). This reduces the number of times data has to be copied to and from main memory. Since CPUs generally works on the same data set for a period of time before moving on to another task, the act of loading in data once in a while and then operating on the registers for a longer period of time is an efficient and elegant method of processing data.

Arithmetic/Data — These are instructions that manipulate data. The simplest and easiest instruction to understand may be the add instruction. This instruction will add two values together and compute the result.

add r0, r1, r2

The above example adds the value inside register 1 and register 2 and places the result in register 0.

Other types on instructions include subtract, logical AND, XOR, data shifting, multiply, etc. In the RISC paradigm, these instructions only operate on data held in registers within the CPU. Any data from main memory must be brought inside the CPU using a load instruction before it can be used in these instructions.

Control — One of the most important and valuable reasons to use a CPU is its ability to handle multiple tasks. Functions or applications that may not have been envisioned during the initial phase of a product design can be added in later versions. In practice, this flexibility and versatility means that product developers can change their minds, or update their product designs, without requiring hardware upgrades. From the user perspective it means that new functions can be added to their devices and that they can use more than one function at a time. It is the ability of a computer to make decisions that distinguishes it from a simple calculator. The most common type of control instruction is the "branch" instruction. This instruction changes the order of the program flow based on some condition.

For example, in computer programming, one basic set of tools is the if-then-else set of instructions. We can see how this applies with an everyday example:

In the simple flowchart example below, John first checks to see if he has any more socks. If he does, then he can simply put them on and continue on to his next task. If he does not, then John will do his laundry.

RISC Example 2

The branch instruction, as defined by the ARM instruction set and implemented by Marvell can take on multiple forms. The most basic form is beq, which stands for "branch if equal." In the case of John and his socks, the CPU will first determine if he has any more socks. Once this is determined, the CPU will flag this information. On the beq instruction, the CPU will check its flag, and make a decision based on what it says. The CPU will then branch, or go to a different portion of the program. Remember, normally a CPU simply executes one instruction after another. A branch instruction forces the CPU to skip forward or backwards to a separate set of instruction.

Instruction F, below, represents the BEQ instruction which checks to see if John has any more socks. If he does, then he can branch to instruction K. If he does not, then the CPU will resume execution at instruction G instead.

RISC Example 1

Section 4: CPU Execution

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