88EA1517 100BASE-TX PHY
Marvell® 88EA1517 100 Mbs Ethernet Transceivers are physical layer devices containing a single Gigabit Ethernet transceiver. The transceiver implements the Ethernet physical layer portion of the 100BASE-TX, and 10BASE-T standards.
The transceiver is qualified for automotive applications and is fully AECQ100 qualified. The part supports a wide range of automotive applications when RGMII (Reduced pin count GMII for direct connection) to Copper or MII to Copper connection is required.
The device also integrates MDI interface termination resistors into the PHY. This resistor integration simplifies board layout and reduces board cost by reducing the number of external components. The new Marvell calibrated resistor scheme will achieve and exceed the accuracy requirements of the IEEE 802.3 return loss specifications.
The 88EA1517 device has an integrated switching voltage regulator to generate all required voltages and can run off a single 3.3V supply; the device supports 1.8V, 2.5V, and 3.3V LVCMOS I/O Standards. This device uses advanced mixed-signal processing to perform equalization, echo and crosstalk cancellation, data recovery, and error correction at a gigabit per second data rate. The 88EA1517 achieves robust performance in noisy environments with very low power dissipation.
- AEC-Q100 Grade 2 qualified
- 40-pin QFN package, 0.5 mm pitch, 6mmx6mm
- Reduces the PHY latency(transmit and receive) by up to 40 percent compared to non-optimized designs
- Total (RX+TX) latency < 400 ns (for both 100BASE-TX and 1000BASE-T modes with 1518 byte frames)
- EEE Support (IEEE 802.3az)
- IEEE 1588v2 support with hardware acceleration
- Offers 16 PHY addresses for easier programming
- Automotive OBD applications using MII/RGMII interface