A scale-out network wires thousands of racks — row upon row across a floor — into a single AI cluster, tied together by hundreds of thousands of optical links. Marvell builds the interconnect silicon and switching at the heart of that fabric, matched to every link within it.
To build a modern AI cluster, row upon row of racks have to be wired together into one fabric — thousands of them, under one roof, moving data east to west between accelerators at the heart of every training run and every large inference job. That fabric is scale out. It sits between scale up, which tightly couples accelerators into a single compute domain, and scale across, which connects separate data centers. Scale out is the tier that turns a room full of racks into one machine.
Scale out is the connectivity that links racks across many rows into a single AI cluster within a data center. It’s the east-west fabric that lets thousands of accelerators work as one.
A scale-out network, or fabric, ties thousands of racks — row upon row, under one roof — into a single AI cluster. Across that fabric, hundreds of thousands of links do the work, but they’re not carbon copies of one another. A short hop between adjacent racks and a reach across a data hall place entirely different demands on the connection. Each link balances five variables against one another:
No single interconnect type optimizes all five. Reach for maximum distance and you spend power and cost; strip out power and cost and you give up reach. A fabric that scales efficiently is the one that uses the right interconnect for each link.
Marvell builds the silicon across the entire range of scale-out interconnect, so every link can be matched to the option that best fits the requirement.
Scale-out links fall on a continuum, from the shortest, lowest-power copper cables to the highest-performance retimed optics and co-packaged designs. Marvell silicon spans every class:
| Interconnect type | What it is | Where it fits best |
| ACC Active copper cable | Copper with a linear equalizer; no DSP | The shortest links: ~2m at 1.6T, between adjacent racks |
| AEC Active electrical cable | Copper with a PAM4 DSP at each end | Short rack-to-rack links: up to 7m at 1.6T |
| AOC Active optical cable | Optical cable using the same PAM4 DSPs as optical modules | Rack-to-rack optical beyond copper's reach: >30m at 1.6T |
| LPO Linear-drive pluggable optics | Optical without DSP retiming | Short optical links where power and latency matter most |
| TRO Transmit-retimed optics | Retimes the transmit path only | A balance of reach and power for use with switches equipped with high-performance SerDes |
| FRO Full-retimed optics | Full DSP retiming, transmit and receive | The longest, highest-bandwidth links across the floor |
| NPO Near-package optics | Optical engine on the substrate near the package | Field-replaceable with high density and power efficiency at the switch |
| CPO Co-packaged optics | Optical engine inside the package | Maximum density and power efficiency at the switch |
The same core technologies run across the entire spectrum. The Marvell portfolio of PAM4 DSPs — including the 5nm Nova series and the 3nm Ara series — powers retimed optical formats and AEC copper cables alike. Ara-series devices are tuned to each use case, including the Ara DSP for full-retimed optical modules and the Ara T DSP for transmit-retimed optical modules. Marvell TIAs and drivers are found in every optical format, and carry the signal path in LPO, where the DSP is removed, through a Marvell TIA and linear-driver chipset. Marvell optical engines are the foundation of co-packaged designs.
Whichever interconnect type an operator chooses, Marvell silicon can power it.
Pluggable optical modules will lead scale-out connectivity for the next decade.
AI data center capex is accelerating, and the demand for fabric bandwidth is immediate. Pluggable optics are the only interconnect that can scale fast enough to meet it — backed by an ecosystem of 30+ module vendors that Marvell works with. Operators can deploy that capacity now, and shift volume from one vendor to another as any single supplier tightens — de-risking the build in a way a single-source approach cannot. Pluggables let the fabric be serviced, mixed, and upgraded link by link. That is why Marvell sees pluggables carrying the scale-out fabric for the next 8-10 years, with 1.6T modules ramping today and 3.2T on the way.
Co-packaged optics have a role. CPO offers the greatest density and power efficiency, right at the switch, and Marvell builds CPO silicon too, alongside every pluggable and cable format. Marvell supports every scale-out interconnect option so that it can address the specific needs of any given hyperscaler. But co-packaging trades away the serviceability, flexibility, and multi-vendor supply ecosystem that make pluggables the right answer for the immediate, massive build-out of scale-out fabric. Its natural home is the shortest, densest, most tightly co-designed connections: the scale-up domain.
Interconnects carry the data; switching ties them into a fabric. These are the two pillars of connectivity. The switch at the center sets the power, latency, and shape of the entire cluster.
Distributed AI workloads rely on frequent, high-volume communication between compute nodes. Training large models and serving distributed inference pipelines generate sustained east-west traffic that places heavy demands on network infrastructure.
As clusters scale to hundreds of thousands or millions of accelerators, networks must support:
The Marvell® Teralynx® T100 switch is designed to address these challenges. Its the industry's first at 102.4 Tbps that’s built specifically for the AI era. Where legacy switch architectures carry the overhead of the enterprise and cloud networks they were designed for, the T100 switch is a monolithic 102.4T device on 3nm that strips that overhead out — delivering up to 25% lower power than competitive solutions and the industry's lowest latency at this bandwidth tier, at under 1000W typical power consumption.
That efficiency is a scaling lever. As GPU and XPU racks approach 120kW, switching consumes an estimated 15–25% of rack power, so a lower-power switch lets operators place more accelerators inside the same power envelope. And with a 512-port radix, the T100 switch flattens the fabric: fewer tiers, fewer optical hops, lower latency and lower TCO across clusters of tens of thousands of accelerators.
One connected foundation, from copper between racks to optics across the floor, to the network switches that make the fabric:
Optical interconnect silicon
Copper and optical cables
Ethernet switching
Telemetry
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Scale up tightly couples accelerators into a single compute domain — within a rack, and increasingly across a few racks. Scale out connects many such domains — row upon row of racks across a floor — into one cluster. Scale across connects separate data centers. Scale up makes many accelerators act as one domain, while scale out ties many domains into a cluster.
Ultra Ethernet is the Ultra Ethernet Consortium (UEC) standard that adapts Ethernet for AI and HPC fabrics, adding the congestion management, telemetry, and transport features distributed AI training needs. It keeps scale-out open and multi-vendor while closing the performance gap with proprietary fabrics. The Marvell Teralynx T100 switch is built for the latest Ultra Ethernet Consortium standards.
Marvell builds the silicon across the whole scale-out fabric, both the interconnect and the switching. That spans PAM4 optical DSPs, coherent-lite DSP, TIAs, drivers, and optical engines across every module and cable format; AEC and AOC copper-and-optical cable silicon; Teralynx Ethernet switches built for Ultra Ethernet; and the RELIANT interconnect telemetry platform.
Scale out is the connectivity that links racks across many rows into a single AI cluster within a data center. It's the east-west fabric — often hundreds of thousands of links — that lets thousands or even hundreds off thousands of accelerators communicate and work as one during training and large-scale inference.
Scale up tightly couples accelerators into a single compute domain — within a rack, and increasingly across a few racks. Scale out connects many such domains — row upon row of racks across a floor — into one cluster. Scale across connects separate data centers. Scale up makes many accelerators act as one domain, while scale out ties many domains into a cluster.
A range, because the links aren't all the same. Copper cables (ACC, AEC) for the shortest rack-to-rack links; active optical cables (AOC) just beyond copper's reach; and pluggable optics in transmit-retimed (TRO), full-retimed (FRO) and linear (LPO) formats for longer links. Near-package optics (NPO) and co-packaged (CPO) optics offer maximum density at the switch. Marvell builds silicon across the entire range.
The Marvell view is that pluggable optical modules will lead scale-out connectivity for the next decade. Pluggables are the only interconnect that can scale fast enough to meet immediate AI bandwidth demand, and they let operators service, mix, and upgrade the fabric link by link. Co-packaged optics have a role at the highest densities, and Marvell builds CPO silicon too, but its natural home is the shortest, densest links of scale up.
High-radix switches reduce hop count and improve bandwidth utilization, simplifying network topology as clusters grow.
Ethernet is open, multi-vendor, and scaling fast for AI through the Ultra Ethernet Consortium. It lets operators build large fabrics without locking into a single vendor. The Marvell Teralynx T100 switch brings 102.4T of purpose-built, low-power Ethernet switching to that fabric.
The full connectivity stack: PAM4 optical DSPs, coherent-lite DSPs, TIAs, drivers, and optical engines across every module and cable format; AEC and AOC cable silicon; Teralynx Ethernet switching; and the RELIANT interconnect telemetry platform matched to every link in the fabric.
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