By Eyal Worthalter, Director, Security Sales, Marvell
For more than a decade, the cloud has been rewriting the rules of cryptographic security. Signing, certificate management, tokenization and encryption key management have all found their way from on-premises hardware security modules (HSMs) into fully managed cloud services. But one corner of the HSM world has stubbornly resisted that shift: payments.
Until now, there has been no true cloud HSM for payments. That is changing with Azure Cloud HSM v2, a new offering built jointly by Marvell, Microsoft and Utimaco, entering public preview in September 2026.
To understand why this matters, it helps to look back at where payment security came from, and why it took a different path than the rest of the cryptography world.
Where It All Started: The Atalla Box
This is the payments chapter of a much broader evolution in Azure key management. Azure began by making HSM backed key protection available as a shared cloud service, expanded to dedicated HSM appliances for customers requiring exclusive hardware control, and then evolved toward cloud-native, single-tenant HSM services that deliver tenant isolation, customer control, and cloud-scale operations without requiring customers to manage the underlying hardware. Azure Payment HSM v2 extends that evolution to the highly specialized world of payment cryptography.
By Chander Chadha, Director of Product Marketing, Storage Products, Marvell
As AI models grow larger and inference workloads scale, larger models, longer context windows and growing KV caches are driving demands on memory resources. Traditional CPU-centric networked JBOF (Just Bunch of Flash) can’t keep pace with the throughput, latency, and efficiency requirements of these modern AI clusters.
DPU (data processing unit) -based storage is a compelling alternative to traditional storage, acting as the broker between the network and SSD for remote storage. By offloading storage, networking and security processing from the host CPU onto a dedicated DPU, AI infrastructure can move data closer to compute, reduce latency, and free up valuable CPU cycles for AI workloads.
To address this need, Marvell offers the OCTEON DPU family, purpose-built for hyperscale cloud workloads and data center applications, extending its use specifically into network storage acceleration for AI environments.
By Khurram Malik, Associate Vice President, Custom Cloud Solutions, Marvell
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The rapid growth of AI is creating unprecedented demand for memory capacity. As models get larger and workloads become more data-intensive, traditional server architectures are increasingly challenged to scale memory efficiently.
At Flash Memory Summit (FMS), Marvell demonstrated how CXL can enable a more flexible and scalable approach to memory infrastructure, showcasing an end-to-end architecture at the Intel® booth.
The demonstration combined an Intel platform with three Marvell® technologies: Structera® X CXL memory expander, Structera® S CXL switch and Alaska® P PCIe retimer. Together, they demonstrated how memory expansion, CXL switching and high-speed PCIe connectivity can work together within a real server platform.
By Arifur Rahman, Director of Product Marketing, Custom Cloud Solutions, Marvell
Memory has become the defining constraint of modern AI infrastructure. Large language models, in-memory databases, and deep learning recommendation models all share the same bottleneck: there is never enough DRAM. Compute Express Link (CXL) was designed to break that bottleneck but a CXL memory expander is only as valuable as the breadth of platforms it can run on.
That is why ecosystem enablement is a core pillar of Marvell's CXL strategy. Today we are marking a new milestone: successful interoperability of the Marvell® Structera™ X CXL memory-expansion controller with the NVIDIA Vera CPU platform.
By Khurram Malik, AVP, Data Center Memory and Storage Solutions, Marvell
CXL has become one of the most important technologies shaping AI infrastructure. As hyperscalers race to deploy larger AI models, longer context windows and increasingly memory-intensive inference workloads, memory capacity and bandwidth have emerged as critical constraints on performance, efficiency and scaling. At the same time, CXL adoption is reaching an inflection point, moving from evaluation into real-world deployment across hyperscale environments.
Marvell is leading this transition with Structera™ X memory expansion solutions developed alongside the world’s leading hyperscalers. The story begins with the shipping of Structera X 2404 and 2504 platforms, which have enabled hyperscalers to expand memory resources more efficiently, including extending the useful life of existing DDR4 investments while powering demanding AI workloads.
Structera X is not a series of disconnected product eras—it is a single, continuous architectural evolution. Today’s generation is already delivering real hyperscaler deployments, ecosystem maturity and a compelling TCO advantage. From that foundation, Marvell is extending the architecture toward the next phase of AI infrastructure innovation, adding capabilities enabled by the evolving CXL 3.2 ecosystem, PCIe Gen 6 connectivity and more advanced multi-host memory sharing architectures. These advancements will create larger, more flexible memory pools, enabling more efficient sharing of resources across servers and improving infrastructure utilization at hyperscale. As the architecture advances, Marvell is driving it toward higher bandwidth, deeper data optimization and increasingly disaggregated memory environments built to meet the growing demands of AI workloads.
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