AI and ML workloads are rewriting the rules of data center design. Memory demands are reaching an unprecedented level due to growing LLM sizes, expanding context windows and growing KV-cache requirements. Traditional servers are not architected to meet this surge. Memory has become the primary bottleneck constraining AI performance and infrastructure efficiency. CXL-based memory expansion has emerged as one of the definitive architectural answers, and Marvell is raising the bar.
Building on the strong market adoption of the first-generation Structera® X CXL controllers, the second-generation Structera X 3406 and Structera X 3506, co-developed and co-architected with leading hyperscalers, address the most demanding AI infrastructure requirements.
| Structera X 3406 (DDR4) | Structera X 3506 (DDR5) |
Part Number | MV-SLX34061 | MV-SLX35061 |
CXL Version | CXL 3.2 | |
PCIe | Gen 6 x16 | |
Host Support | Up to 4 hosts | |
DDR Channels | 6 X 72-bit DDR4 | 6 X 80-bit DDR5 |
Max DIMMs | 18 DIMMs (3DPC) | 12 DIMMs (2DPC) |
Max Capacity | 9 TB | 6 TB |
Host Bandwidth | 256 GB/s | |
Compression/ Decompression | LZ4 and 5x bandwidth vs. prior generation | |
Security | CXL IDE, eHSM w/ Post Quantum, Caliptra SS 2.1 | |
Modern AI inference workloads, from LLM serving to deep learning recommendation models (DLRM), are memory bound. KV-cache capacity determines time-to-first-token (TTFT), throughput and XPU utilization. When memory runs out, performance collapses.
Structera X 3406/3506 directly addresses these challenges with the following features and respective benefits:
The global DDR5 supply crunch is upending data center expansion plans. Structera X 3406/3506 provides a two-pronged solution:
Marvell is the only provider with a complete end-to-end CXL portfolio spanning memory expansion (Structera X), near-memory acceleration (Structera A), and Photonic Fabric™ Technology (Photonic Fabric Memory Appliance, PFMA), giving customers a single, integrated architecture from controller to fabric.
Structera X 3406/3506 builds directly on this foundation—same proven software stack and ecosystem integrations with accelerated ramp. Customers already deploying Gen 1 have a clear, low-friction upgrade path to Gen 2 performance and capacity. The Marvell® CXL ecosystem continues to expand across the full data center stack through close partnership with CPU and memory vendors, OEMs, ODMs and system integrators.
![]()
###
This blog contains forward-looking statements within the meaning of the federal securities laws that involve risks and uncertainties. Forward-looking statements include, without limitation, any statement that may predict, forecast, indicate or imply future events or achievements. Actual events or results may differ materially from those contemplated in this blog. Forward-looking statements are only predictions and are subject to risks, uncertainties and assumptions that are difficult to predict, including those described in the “Risk Factors” section of our Annual Reports on Form 10-K, Quarterly Reports on Form 10-Q and other documents filed by us from time to time with the SEC. Forward-looking statements speak only as of the date they are made. Readers are cautioned not to put undue reliance on forward-looking statements, and no person assumes any obligation to update or revise any such forward-looking statements, whether as a result of new information, future events or otherwise.
Tags: AI, AI infrastructure, memory, Data Center, xPU utilization, Next-Generation Data Centers, Hyperscale data centers
Copyright © 2026 Marvell, All rights reserved.