Posts Tagged 'Data Processing'
-
September 10, 2026
Marvell Demonstrates Scalable CXL Memory Infrastructure with Intel
By Khurram Malik, Associate Vice President, Custom Cloud Solutions, Marvell
The rapid growth of AI is creating unprecedented demand for memory capacity. As models get larger and workloads become more data-intensive, traditional server architectures are increasingly challenged to scale memory efficiently.
At Flash Memory Summit (FMS), Marvell demonstrated how CXL can enable a more flexible and scalable approach to memory infrastructure, showcasing an end-to-end architecture at the Intel® booth.
The demonstration combined an Intel platform with three Marvell® technologies: Structera® X CXL memory expander, Structera® S CXL switch and Alaska® P PCIe retimer. Together, they demonstrated how memory expansion, CXL switching and high-speed PCIe connectivity can work together within a real server platform.
-
September 09, 2026
Marvell Structera X Extends CXL Interoperability to NVIDIA Vera
By Arifur Rahman, Director of Product Marketing, Custom Cloud Solutions, Marvell
Memory has become the defining constraint of modern AI infrastructure. Large language models, in-memory databases, and deep learning recommendation models all share the same bottleneck: there is never enough DRAM. Compute Express Link (CXL) was designed to break that bottleneck but a CXL memory expander is only as valuable as the breadth of platforms it can run on.
That is why ecosystem enablement is a core pillar of Marvell's CXL strategy. Today we are marking a new milestone: successful interoperability of the Marvell® Structera™ X CXL memory-expansion controller with the NVIDIA Vera CPU platform.
-
August 04, 2026
Marvell Structera™ X, A and S: A Comprehensive CXL Portfolio Powering AI Memory Innovation
By Khurram Malik, AVP, Data Center Memory and Storage Solutions, Marvell
CXL has become one of the most important technologies shaping AI infrastructure. As hyperscalers race to deploy larger AI models, longer context windows and increasingly memory-intensive inference workloads, memory capacity and bandwidth have emerged as critical constraints on performance, efficiency and scaling. At the same time, CXL adoption is reaching an inflection point, moving from evaluation into real-world deployment across hyperscale environments.
Marvell is leading this transition with Structera™ X memory expansion solutions developed alongside the world’s leading hyperscalers. The story begins with the shipping of Structera X 2404 and 2504 platforms, which have enabled hyperscalers to expand memory resources more efficiently, including extending the useful life of existing DDR4 investments while powering demanding AI workloads.
Structera X is not a series of disconnected product eras—it is a single, continuous architectural evolution. Today’s generation is already delivering real hyperscaler deployments, ecosystem maturity and a compelling TCO advantage. From that foundation, Marvell is extending the architecture toward the next phase of AI infrastructure innovation, adding capabilities enabled by the evolving CXL 3.2 ecosystem, PCIe Gen 6 connectivity and more advanced multi-host memory sharing architectures. These advancements will create larger, more flexible memory pools, enabling more efficient sharing of resources across servers and improving infrastructure utilization at hyperscale. As the architecture advances, Marvell is driving it toward higher bandwidth, deeper data optimization and increasingly disaggregated memory environments built to meet the growing demands of AI workloads.
-
April 01, 2021
Marvell Enables O-RAN to Help 5G Fulfill its True Potential
By Marvell, PR Team
At the most recent FierceWireless 5G Blitz Week, some of the world’s leading 5G innovators met via webinar to discuss the potential of O-RAN and challenges of the ongoing 5G rollout. In a keynote, EVP and General Manager of Marvell’s Processors Business Group Raj Singh explored the accelerating shift to O-RAN, which is an emerging open-source architecture for Radio Access Networks that enables customers to create better 5G applications by mixing and matching RAN technology from different vendors.
O-RAN architectures are compelling because they increase competition among vendors, reduce costs, and offer customers greater flexibility to combine RAN elements according to their application’s specific use cases. However, in addition to their obvious benefits, O-RAN solutions also raise operator concerns including potential challenges with integration, legacy support, interoperability and security – issues that Marvell and other companies in the Open RAN Policy Coalition are addressing through shared standards, proven solutions and innovative approaches.
Recent Posts
- Marvell Montage: Stories of Recharging and Finding Meaning
- Breaking Through the KV Cache Memory Wall with DPU-powered Network Storage
- Marvell Demonstrates Scalable CXL Memory Infrastructure with Intel
- Marvell Structera X Extends CXL Interoperability to NVIDIA Vera
- Engineered to Collaborate: Robot Racing as a Microcosm of Marvell
