By Preet Virk, Senior Vice President and General Manager, Photonic Fabric Business Unit
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Modern AI infrastructure is built around multi-rack systems where thousands to tens of thousands of accelerators operate as a single logical compute element. As agentic AI and Mixture of Experts (MoE) models accelerate AI adoption, they are driving unprecedented scale and communication demands across data center infrastructure. These systems are connected by scale-up and scale-out networks that must deliver high bandwidth, low latency and efficient power. As these networks extend across racks, maintaining that performance becomes a primary challenge.
As AI systems grow in complexity and scale, the network becomes the backbone of the compute system. Large-scale clusters require massive XPU-to-XPU communication, driving an evolution beyond legacy protocols like PCIe® to encompass UALink™ (Ultra Accelerator Link), ESUN (Ethernet scale-up networking) and NVLink.
Meeting these requirements demands a new approach to connectivity. Marvell provides a comprehensive AI connectivity portfolio spanning scale-up, scale-out, scale-across and DCI (data center interconnect) network architectures. For scale-up networking, Marvell delivers copper and optical interconnects connecting XPUs, switches and memory. Within the rack, Marvell copper solutions provide low-latency, power-efficient short-reach connectivity, while Marvell optical interconnects enable high-performance scaling beyond the rack. This enables XPUs to operate as a more efficient, unified system as scale-up domains expand.
By Joseph Chon, Senior Director, Product Marketing, Data Center Interconnect, Marvell
MACsec is moving to the module in scale-across networks.
Media Access Control security (MACsec) is a foundational technology for protecting data in motion. It encrypts and authenticates Ethernet traffic to guard against eavesdropping, denial-of-service attacks, intrusion and other security threats while also strengthening overall data integrity. Embodied in silicon, MACsec further establishes a robust root of trust for managing encryption keys and securing the boot process.
What’s changing is where the silicon for delivering MACsec gets located.
To date, the MACsec circuitry for long-distance scale-across networks has typically been embedded in the switch ASIC, where space and silicon real estate are at an absolute premium. Embedding MACsec into the tight confines of the ASIC raises the cost of integrating the technology. It also makes infrastructure less flexible: some upgrades require taking the system offline, reducing overall capacity.
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